It is known and necessary that finally produced integrated circuits (chips) must be tested in the wafer compound to find out the good dies. Such a test is performed with so-called wafer prober equipments that have needle cards or similar contacting elements, which are used to realize an electrical contact between the tips of the needles or the other contacting elements and contact pads made of aluminum or another metal on the wafer.
As soon as the electrical contact is realized, the wafer prober generates test sequences for testing the integrated circuit. To realize a good electrical contact between the tips of the needles of the needle card and the Al pads it is necessary to generate a contact with sufficient force between the contact partners so that the result is a good electrical contact.
Current probing/testing operations at wafer level are known to induce cracks in the passivation layers below the probing area due to the mechanical forces applied by the probing process. These cracks can propagate into the chip and cause corrosion of the interconnects (e.g., copper wiring) resulting in reliability failures.
For example, the probing process using conventional probe techniques (e.g., cantilever—vertical—membrane, etc.) can cause damage on the Al pads and the underlying rigid passivation layer (mostly SiO2, SiN or both materials) below the Al pads. These cracks can propagate through the passivation layer and reach the interconnects (e.g., Cu-wiring). Moisture can penetrate through these cracks into the chip and can cause corrosion of the Cu-wiring. This issue becomes even more important for the interconnects using low-k-(or ultra low-k-) dielectric material with less mechanical strength and less resistance to moisture update.
Similar effects could happen at wire bonding caused by the necessary bonding force so that the bonding tool (capillary or wedge) can cause damages in the layers below the bonding pad.